Mixed-Level Fault Coverage Estimation
作者： Alberto L. Sangiovanni-Vincentelli , Hi Keung Ma
关键词: Engineering 、 Automatic test pattern generation 、 Fault indicator 、 Fault detection and isolation 、 Stuck-at fault 、 Fault coverage 、 Transistor fault 、 Very-large-scale integration 、 Observability 、 Electronic engineering
摘要: A Fault coverage estimation technique for mixed-level circuit is described. Observability formulae combinational multiple-input multiple-output functional block are derived. Special procedures estimating CMOS transistor fault detection probability developed, and the implementation of a FAult Coverage Estimation (FACE) system
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sci-hub.st 参考文章(8)
F. Stott, C. Timoc, L. Hess, C. Pina, M. Buehler, T. Griswold, Logical Models of Physical Failures. international test conference. pp. 546- 553 ,(1983)
Jacob A. Abraham, Ning San Chang, Ravi M. Apte, LOGIC FUNCTION EXTRACTION FOR NMOS CIRCUITS. IEEE. ,(1982)
Hao N. Nham, Chi-Yuan Lo, Ajoy K. Bose, A Data Structure for MOS Circuits design automation conference. pp. 619- 624 ,(1983) , 10.5555/800032.800734
Vishwani D. Agrawal, Sunil K. Jain, Test Generation for MOS Circuits Using D-Algorithm design automation conference. pp. 64- 70 ,(1983) , 10.5555/800032.800642
Vishwani D. Agrawal, Sunil K. Jain, STAFAN: An Alternative to Fault Simulation design automation conference. pp. 475- 480 ,(1984) , 10.5555/800033.800768
Alberto L. Sangiovanni-Vincentelli, Gary D. Hachtel, Curtis T. McMullen, Robert King Brayton, Logic Minimization Algorithms for VLSI Synthesis ,(1984)
Madhukar K. Reddy, Prathima Agrawal, Sudhakar M. Reddy, Transistor Level Test Generation for MOS Circuits design automation conference. pp. 825- 828 ,(1985) , 10.5555/317825.318007
Prabhakar Goel, Test generation costs analysis and projections Proceedings of the seventeenth design automation conference on Design automation - DAC '80. pp. 77- 84 ,(1980) , 10.1145/800139.804515