Method and structure for testing embedded analog/mixed-signal cores in system-on-a-chip
作者： Rochit Rajsuman
DOI:
关键词: Mixed-signal integrated circuit 、 Integrated circuit 、 Test register 、 Computer science 、 Core (optical fiber) 、 System on a chip 、 Microprocessor 、 Computer hardware 、 Chip 、 Assembly language
摘要: A method of testing an embedded analog core in integrated circuit chip having a microprocessor and memory core. The includes the steps providing test register between to be tested, core, using assembly language program running on generate pattern by applying evaluating response either or system provided outside chip.
lens.org 参考文章(3)
Jerzy Tyszer, Janusz Rajski, Arithmetic built-in self-test of multiple scan-based integrated circuits ,(2004)
Rochit Rajsuman, Ching-Yen Ho, Application specific integrated circuit chip and method of testing same ,(1996)
Rochit Rajsuman, Hiroaki Yamoto, Method and structure for testing embedded cores based system-on-a-chip ,(1998)