Variable segment size plural cache system with cache memory unit selection based on relative priorities of accessed encached programs
作者： Akira Bannai , Shohei Suzuki
DOI:
关键词: Computer hardware 、 Cache pollution 、 Cache coloring 、 Cache algorithms 、 Cache invalidation 、 Page cache 、 Computer science 、 Cache 、 Operating system 、 Memory data register 、 CPU cache
摘要: A cache memory control system has a segment descriptor with 1-bit unit designation field, and register for storing data representing the field. An output from is supplied to one unit, whereas inverted of other unit.
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