Two-pattern test generation with low power consumption based on LFSR
作者： M. Puczko , V.N. Yarmolik
关键词: Built-in self-test 、 Minification 、 Test sequence 、 Test (assessment) 、 Arithmetic 、 Structure (mathematical logic) 、 Computer science 、 Linear feedback shift register 、 Power consumption 、 Logic synthesis
摘要: A method of logic synthesis for low-power design two-patterns test sequence is presented in this paper. The idea power consumption minimization by modifying the structure LFSR (Linear Feedback Shift Register) have been proposed. In paper some examples are included.
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