Flash memory device with multiple checkpoint erase suspend logic
作者： Kong Mou Liou , Yu-Sui Lee , Weitong Chuang , Tzeng-Huei Shiau , Ray Lin Wan
DOI:
关键词: Flash memory 、 Parallel computing 、 Computer hardware 、 Process (computing) 、 Computer science 、 Block (telecommunications)
摘要: A flash memory device (10) includes a multiple checkpoint erase suspend algorithm. user may issue an command at any time during process. Erase logic (15) is coupled to (12) and executes procedure which interrupts the block after receiving commande first occur of set checkpoints in procedure. After interrupting procedure, returning complete erase.
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