作者: Tomoshi Futatsuya , Yoshikazu Miyawaki , Takeshi Nakayama , Shinichi Kobayashi , Yasushi Terada
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摘要: A flash EEPROM including a memory cell array divided into first and second blocks. Erase pulse applying circuits for erase pulses to cells verifying erase-verifying the are provided one each of those two The circuit corresponding block operate separately from block. controlled by their circuits. That is, enables its only when detecting in which data is incomplete