作者: In Kyu Chun
DOI:
关键词: Copper interconnect 、 Copper 、 Barrier layer 、 Chemical-mechanical planarization 、 Trench 、 Layer (electronics) 、 Substrate (electronics) 、 Optoelectronics 、 Semiconductor device 、 Materials science
摘要: Methods for fabricating a copper interconnect of semiconductor device are disclosed. An example method deposits first insulating layer on substrate having at least one predetermined structure, forms trench and via hole through the by using dual damascene process, barrier along bottom sidewalls hole. The filling with performing planarization Ta/TaN over including interconnect, removes some portion so that remains only second layer, removing fills conductive material to complete via.