Hardware interface to a high-speed multiplexed link
作者： Kurt A. Hedlund
DOI:
关键词: Computer hardware 、 Megabit 、 Interface (computing) 、 Multiplexing 、 State (computer science) 、 Asynchronous communication 、 Computer science 、 Gigabit 、 Link (geometry) 、 Intermediate storage
摘要: A link interface to a high-speed asynchronous multiplexed ATM telecommunication includes data segmenter for forming cells out of frames, and assembler state memory assembling frames received (interleaved)ATM cells. novel architecture implemented in hardware, characterized by absence intermediate storage the pipelined operation assembler, allows operate at hundreds Megabits Gigabits per second.
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