Delta sigma modulator
作者： Naoto Oikawa
DOI:
关键词: Discrete circuit 、 Physics 、 Clock domain crossing 、 Electrical engineering 、 Electronic circuit 、 Delta-sigma modulation 、 Clock signal 、 Asynchronous circuit 、 Electronic engineering 、 Synchronous circuit 、 Clock skew
摘要: A data latch circuit of a delta sigma modulator is controlled in timing output by clock signal. For this purpose, the has reverse phase input terminal connected to first delay and forward second circuit. The composed two P-MOS transistors N-MOS transistors. times circuits are coincided, those respective P- also coincided.
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