A direct synthesis method of cascaded continuous-time sigma-delta modulators
作者： R. Tortosa , J.M. de la Rosa , A. Rodriguez-Vazquez , F.V. Fernandez
DOI: 10.1109/ISCAS.2005.1465903
关键词: Electronic engineering 、 Circuit complexity 、 Time transformation 、 Transfer function 、 Power consumption 、 Pole–zero plot 、 Robustness (computer science) 、 Electronic circuit 、 Delta-sigma modulation 、 Mathematics
摘要: This paper presents an efficient method to synthesize cascaded sigma-delta modulators implemented with continuous-time circuits. It is based on the direct synthesis of whole architecture in domain instead using a discrete-to-continuous time transformation as has been done previous approaches. In addition place zeros loop filter optimum way, proposed methodology leads more architectures terms circuit complexity, power consumption and robustness respect nonidealities.
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