作者: Zaiping Zeng , Francois Triozon , Yann-Michel Niquet , Sylvain Barraud
DOI: 10.1109/SISPAD.2016.7605196
关键词: Transistor 、 Thin film 、 Planar 、 Scaling 、 Silicon 、 Optoelectronics 、 Gallium arsenide 、 k-nearest neighbors algorithm 、 Nanotechnology 、 Materials science 、 Logic gate
摘要: Multi-gate transistors have attracted considerable attention as a way to overcome the scaling issues of planar MOSFETs. Although effects structural confinement on carrier mobilities been discussed extensively, transition from silicon thin films nanowires (SiNWs) has little investigated. In this contribution, we perform quantum calculations size-dependent in gate-all-around rectangular SiNWs with leading dimension up 50 nm, non-equilibrium Green's functions (NEGF) framework. We find that when smallest width or height falls sub-10 nm range, nearest neighbor corner channels tend merge and form “side channels” much lower mobilities. On top numerical results, derived simple model, which bridges square NW devices film devices, describes size dependence wide range dimensions.