MARS: A Multiprocessor-Based Programmable Accelerator

作者: P. Agrawal , W.J. Dally , W.C. Fischer , H.V. Jagadish , A.S. Krishnakumar

DOI: 10.1109/MDT.1987.295211

关键词: Hardware accelerationMultiprocessingVery-large-scale integrationEmbedded systemTelecommunications networkAccelerationFlexibility (engineering)Logic simulationComputer scienceMars Exploration Program

摘要: MARS, short for microprogrammable accelerator rapid simulations, is a multiprocessor-based hardware that can efficiently implement wide range of computationally complex algorithms. In addition to accelerating many graph-related problem solutions, MARS ideally suited performing event-driven simulations VLSI circuits. Its highly pipelined and parallel architecture yields performance comparable existing special-purpose simulators. has the added advantage flexibility because its processors are custom-designed be reconfigurable. When programmed as logic simulator, should able achieve 1 million gate evaluations per second.

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