作者: Kanupriya Gulati , Sunil P Khatri , Kanupriya Gulati , Sunil P Khatri
DOI: 10.1007/978-1-4419-0944-2_9
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摘要: In this chapter, we explore the implementation of fault table generation on a graphics processing unit (GPU). A is essential for diagnosis and detection in VLSI testing debug. Generating requires extensive simulation, with no dropping, extremely expensive from computational standpoint.