作者: Minesh B. Amin , Bapiraju Vinnakota
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摘要: Simulation at the gate level is computationally very expensive. Parallel processing one technique to reduce simulation time. Possessing knowledge of distribution computational activity in can aid parallelizing it efficiently. We present a new characterization workload fault simulation. An empirical analysis shows that circuit specific, and largely independent vector set being simulated. inexpensive method predict also discussed.