Network topology exploration of mesh-based coarse-grain reconfigurable architectures

摘要: Several coarse-grain reconfigurable architectures proposed recently consist of a large number processing elements (PEs) connected in mesh-like network topology. We study the effects three aspects topology exploration on performance applications these architectures: (a) changing interconnection between PEs, (b) way is traversed while mapping operations to and (c) communication delays interconnects PEs. propose traversal strategies that first schedule PEs are spatially close have more interconnections among them. use an interconnect aware list scheduling heuristic as vehicle perform experiments set designs derived from DSP applications. Our experimental results show spiral strategy, coupled with two neighbor leads good for benchmarks considered. prototype framework thus provides environment system architects explore tune particular application domains.