作者: Johann Greschner , Howard L. Kalter , H. Bernhard Pogge
DOI:
关键词: Electronic engineering 、 Matching (statistics) 、 Integrated circuit 、 Integrated circuit packaging 、 Chip 、 Surface (mathematics) 、 Semiconductor 、 Quad Flat No-leads package 、 Engineering
摘要: An integrated circuit package including a carrier having surface topography of projections or recesses for supporting individual semiconductor chips conversely matching bottom to permit self-aligned positioning the chip on carrier.