Error detection and correction
作者： Sompong P. Olarig , Michael F. Angelo
DOI:
关键词: Computer hardware 、 Error detection and correction 、 Central processing unit 、 Bit field 、 Least number bits 、 Bit array 、 Effective number of bits 、 Memory address 、 Bit stuffing 、 Computer science
摘要: A computer system includes a processor bus having data and check bits for performing error detection correction of the data. CPU is coupled to bus. memory sub-system bits, address an device detecting in using bits. The can include from Pentium® Pro family processors. generates syndrome table which plurality entries mapped correctable or uncorrectable errors, detected multiple-bit entry entry. An also
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