作者: Kazuhisa Yamamoto
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摘要: An ECC decoder detects a no error, correctable error or an uncorrectable state and reports to art upper controller after user data is read. A indicative of the completion correction, erroneous abnormal operation detected logged for every process subblock unit in decoder, thereby enabling such be referred from controller. detection code provided detect non-detection correction errors when exceed correcting ability decoder. Further, circuit obtain values γ n0 nn decide solutions β k simultaneous equations (n) unknowns by formed sequentially coupling arithmetic operating one unknown unknowns. location each fixed variable length The presumes start executes dummy search switches ordinary at subblock. When header counting section record head discriminated, delay time switched short according block length, preventing large corresponding record.