Method of fabricating anti-fuse for silicon on insulator devices

作者: Ali Khakifirooz , Kangguo Cheng , Juntao Li

DOI:

关键词: NanotechnologySubstrate (printing)Layer (electronics)Etching (microfabrication)Silicon on insulatorOptoelectronicsCathodePhotoresistMaterials scienceAnodeSemiconductor

摘要: A method includes depositing a first hard mask layer on substrate; lithographically patterning and etching the substrate to form semiconductor link connected an anode region cathode region; removing from second photoresist opening in link; remove portions of expose portion sidewall recessing sidewalls forming anti-fuse tip with between tips.

参考文章(13)
Pinping Sun, Junjun Li, Yan Zun Li, Chengwen Pei, High performance e-fuse fabricated with sub-lithographic dimension ,(2013)
Sergei Drizlikh, Ashish Kushwaha, David Tucker, Thomas James Moutinho, System and method for manufacturing an integrated circuit anti-fuse in conjunction with a tungsten plug process ,(2006)
Yung-Tin Chen, Chun-Ming Wang, Steven J. Radigan, Method of making pillars using photoresist spacer mask ,(2008)
Yung-Tin Chen, Steven Maxwell, Chun-Ming Wang, Bing K. Yen, Nanoimprint enhanced resist spacer patterning method ,(2008)
Chandrasekharan Kothandaraman, Byeongju Park, Subramanian S. Iyer, Antifuse structure having an integrated heating element ,(2008)
Russell J. Houghton, Jack A. Mandelman, William R. Tonti, Claude L. Bertin, Ramachandra Divakaruni, Structures and methods of anti-fuse formation in SOI ,(2003)
Chandrasekharan Kothandaraman, Kangguo Cheng, Deok-kee Kim, Methods and Structures Involving Electrically Programmable Fuses ,(2007)