Method and circuit for transferring data with dynamic parity generation and checking scheme in multi-port DRAM
作者： Mark Thomman , Huy Thanh Vo , Glen E. Hush
DOI:
关键词: Memory rank 、 Universal memory 、 Electronic circuit 、 CAS latency 、 Computer science 、 Dynamic random-access memory 、 Multi port 、 Computer hardware 、 FLOPS 、 Dram
摘要: An ATM switch including a multi-port memory is described. The having dynamic random access (DRAM) and plurality of input output serial memories (SAMs). Efficient, flexible transfer circuits methods are described for transferring data between the SAMs DRAM. include helper flip/flops to latch editing prior storage in Editing transferred from DRAM also Dynamic parity generation checking detect errors induced during switching.
lens.org 参考文章(24)
Jun C Oki Electric Indus Iwata, Masami C O Oki Electric In Abe, Real-time convolutional decoder with block synchronising function ,(1994)
Kazumasa Yanagisawa, Katsuyuki Sato, Semiconductor integrated circuit device having back-bias voltage generator ,(1985)
James L. Fuhrman, Memory with simultaneous sequential and random address modes ,(1977)
Donald J. Voss, Video graphic dynamic RAM ,(1983)
Jon C. Zierk, In-Nan Wu, King Wang, James T. Koo, Francis C. Hung, Controller for dual ported memory ,(1989)
Mahmut Kemal Ebcioglu, Barbara Alane Chappell, Terry Ivan Chappell, Stanley Everett Schuster, Virtual multi-port RAM ,(1991)
Loren L. McLaury, Multiport memory with pipelined serial input ,(1993)
Anh T. Tran, Paul W. Kemp, Address error detection technique for increasing the reliability of a storage subsystem ,(1993)
Karl M. Guttag, Jerry R. Vanaken, Raymond Pinkham, Fredrick A. Valente, Video serial accessed memory with midline load ,(1985)
Andrew L. Heilveil, Mark F. Novak, Karl M. Guttag, Jerry R. Vanaken, Raymond Pinkham, Donald J. Redwine, Video display system using memory with parallel and serial access employing serial shift registers selected by column address ,(1983)