Virtual multi-port RAM

摘要: A virtual multi-port RAM (VMPRAM) structure has automatic port sequencing and single-port array density speed. VMPRAM employs input-triggered, self-resetting macros in a pipelined architecture to provide multiple self-timed on-chip cycles during one machine cycle. The incorporates an SRAM segmented into many input triggered, self-resetting, fast cycling blocks. timing signal is derived from selected block for releasing the next select signals data inputs are only bus decoded needed wordline bitline pair, cycle time adequate pulse width word lines bitlines. Each block, all circuit blocks path access blocks, input-triggered self-resetting. address latches multiplexed at driver true complement buses segments, those Similarly, reads out onto bus, latched that set up release by of adjacent these