Scalable Approximate DCT Architectures for Efficient HEVC-Compliant Video Coding

摘要: An approximate kernel for the discrete cosine transform (DCT) of length 4 is derived from 4-point DCT defined by High Efficiency Video Coding (HEVC) standard and used computation inverse (IDCT) power-of-two lengths. There are two reasons considering as basic module. First, it allows DCTs lengths 4, 8, 16, 32 prescribed HEVC. Second, generated not only involve lower complexity, but also offer better compression performance. Fully parallel area-constrained architectures proposed to have flexible tradeoff between area time complexities. In addition, a reconfigurable architecture where an 8-point can be in place pair DCTs. Using same reconfiguration scheme, 32-point could configured 16-point or four eight The design support real-time coding high-definition video sequences 8k ultrahigh-definition television format ( $7680\times 4320$ at 30 frames/s). A unified forward hardware complexity reduced sharing IDCT computations. approximation has nearly arithmetic requirement those recently related methods, involves significantly less error energy offers peak signal-to-noise ratio than others when more 8 used. detailed comparison efficiency, performance different schemes presented. It shown that provides compressed-image quality other method perform HEVC-compliant with marginal degradation slight increase bit rate, fraction computational latter.