Two pfet soi memory cells
作者： Tak Hung Ning , Brian Ji , Jin Cai
DOI:
关键词: Silicon on insulator 、 Silicon 、 Electrode 、 Optoelectronics 、 CMOS 、 Layer (electronics) 、 Gate dielectric 、 Materials science 、 Gate oxide 、 Substrate (electronics) 、 Electrical engineering
摘要: A CMOS device includes a silicon substrate and an electrical insulator formed over the substrate. The also access pFET first gate stack storage insulator, including second source region that is co-formed with drain region, channel region. dielectric layer above floating electrode layer.
lens.org 参考文章(8)
James S. Cable, Ronald E. Reedy, EEPROM cell on SOI ,(1999)
Shih-Jye Shen, Ming-Chou Ho, Ching-Hsiang Hsu, Semiconductor memory device having improved data retention ,(2003)
Ching-Sung Yang, Shih-Jye Shen, Ching-Hsiang Hsu, Single poly embedded eprom ,(2002)
Hai-Ming Lee, Hsin-Ming Chen, Ching-Hsiang Hsu, Shih-Jye Shen, Non-volatile memory and operating method thereof ,(2005)
Chih-Hsin Wang, Electrically alterable non-volatile memory cell ,(2004)
Tak H. Ning, John M. Safran, Jin Cai, Cmos eprom and eeprom devices and programmable cmos inverters ,(2007)
Ming-Chiu Ho, Kung-Hong Lee, Shih-Jye Shen, Ching-Hsiang Hsu, Ya-Chin King, Electrically erasable programmable logic device ,(2003)
Ming-Chou Ho, Shih-Jye Shen, Shih-Chen Wang, Hsin-Ming Chen, Silicon-on-insulator (soi) memory device ,(2007)