Using Architectural "Families" to Increase FPGA Speed and Density
作者： Vaughn Betz , Jonathan Rose
关键词: Field-programmable gate array 、 Complex programmable logic device 、 Logic family 、 Logic block 、 Parallel computing 、 Routing (electronic design automation) 、 Reconfigurable computing 、 Computer science
摘要: In order to narrow the speed and density gap between FPGAs MPGAs we propose development of “families” FPGAs. Each FPGA family is targeted at a single maximum logic capacity, consists several “siblings”, or different yet complementary architectures. Any given application circuit implemented in sibling with most appropriate architecture. With properly chosen siblings, one can develop which will have better than any FPGA. We apply this concept create two families, composed architectures types hard-wired blocks other created from heterogeneous blocks. found that eight chips block simultaneously improves by 12 14% 18 20% over best
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