Algorithmic and architectural transformations for low power realization of FIR filters
作者： H. Mehendale , S.D. Sherlekar , G. Venkatesh
关键词: Software 、 Macro 、 Finite impulse response 、 Digital signal processing 、 Memory address 、 Multiplier (economics) 、 Computational complexity theory 、 Computer science 、 Electronic engineering 、 Computer hardware 、 System bus
摘要: We present algorithmic and architectural transforms for low power realization of Finite Impulse Response (FIR) filters implemented both in software on programmable DSPs as hardwired macros. For the DSP based implementation, these transform address reduction program memory data busses also multiplier. propose extensions to support some transformations. The FIR aim at reducing supply voltage while maintaining throughput. that reduce computational complexity filter computation thus achieve reduction.
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