Heteroepitaxy of III–V Zinc Blende Semiconductors on Nanopatterned Substrates

摘要: In the last decade, zinc blende structure III–V semiconductors have been increasingly utilized for realization of high‐performance optoelectronic applications because their tunable bandgaps, high carrier mobility and absence piezoelectric fields. However, integration devices on Si platform commonly used CMOS electronic circuits still poses a challenge, due to large densities mismatch‐related defects in heteroepitaxial layers grown planar substrates. A promising method obtain thin crystalline quality is growth nanopatterned this approach, can be effectively eliminated by elastic lattice relaxation three dimensions or confined close substrate interface using aspect‐ratio trapping masks. As result, an etch pit density as low 3.3 × 10^5 cm^−2 flat surface submicron GaAs accomplished onto SiO2 nanohole film patterned Si(001) substrate, where threading are trapped at mask sidewalls. An open issue that remains resolved gain better understanding interplay between shape, conditions formation coalescence during overgrowth order achieve device