A single-chip CMOS transceiver for DCS-1800 wireless communications
作者： M. Steyaert , M. Borremans , J. Janssens , B. de Muer , I. Itoh
DOI: 10.1109/ISSCC.1998.672370
关键词: Electronic engineering 、 Network topology 、 Electronic circuit 、 CMOS 、 Transceiver 、 Mobile radio 、 Wireless 、 Block (data storage) 、 Engineering 、 Digital radio
摘要: This CMOS transceiver chip for the DCS-1800 wireless communication system is realized in a 0.25 /spl mu/m process. The realization of that complies with specifications high-quality digital-wireless requires overall integration architecture, building block and transistor-level design. A highly-integrated architecture minimizes number high-frequency external nodes, as these are difficult to drive circuits. Up- downconversion topologies allow at same time mixing on-chip single-ended differential conversion. Extra buffers between blocks optimize circuit performance.
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