作者: E. Lemoine , D. Merceron
关键词: Orders of magnitude (time) 、 Control reconfiguration 、 Netlist 、 Sequence 、 Routing (electronic design automation) 、 Field-programmable gate array 、 Embedded system 、 Genomic databases 、 Reduced instruction set computing 、 Computer science
摘要: This paper evaluates the feasibility of reconfiguring an FPGA at run time, and tests its performance using a "Grand Challenge Problem", high speed scanning genomic sequence databases. Algorithm implementation into XC3090 is described, methods proposed for generating placed Xilinx Netlist File that can be efficiently routed time by Automated Placing Routing tools, in order to increase density design. The same algorithm carefully optimised on RISC processor has been compared with reconfigurated FPGA, shows latter have improvement two three orders magnitude.