Reducing program disturb by modifying word line voltages at interface in two-tier stack during programming
作者： Dong Yingda , Chen Hong-Yan
DOI:
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摘要: Techniques for reducing program disturb of memory cells which are formed in a two-tier stack, when selected word line is the upper tier. In one approach, at start phase loop, voltages lines adjacent to interface increased pass voltage before remaining voltage. This delay provides time residue electrons lower tier move toward drain end NAND string reduce likelihood disturb. another maintained 0 V or other turn-off during block passage from
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