A MEMS-first fabrication process for integrating CMOS circuits with polysilicon microstructures

摘要: A MEMS-first fabrication process for integrating CMOS circuits with polysilicon micromechanical structures is described in detail. The overall uses 17 masks to integrate a 1-metal, 2-poly, p-well based LOGOS 3-poly sequence microstructures. microstructures are formed within recesses on the surface of silicon wafers such that their uppermost surfaces coplanar remainder substrate. No special planarization technique, as chemical-mechanical polishing (GMP), used effort here. Special aspects include provisions improve lithography recesses, protect during circuit fabrication, and implement an effective lead transfer between on-chip circuitry. validated using test vehicle includes accelerometers gyroscopes interfaced voltage followers switched-capacitor charge amplifiers. Measured transistor parameters match those obtained standard CMOS.