作者: Bharat Garg , Sujit Kumar Patel
DOI: 10.1007/S11265-020-01542-1
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摘要: The modern portable devices exhibiting multimedia applications demand higher energy efficient signal processing due to limited battery size. approximate adders have shown a remarkable energy-efficiency over the accurate for error tolerant applications. In this paper, three novel carry look-ahead adder (ACLA) architectures are proposed. These ACLAs achieved by simplifying Boolean expression of generation logic such that probability is small while eliminating number gates. Further, accuracy reconfigurable CLA (Re-CLA) provides desired quality/accuracy in given budget post layout synthesis results using Synopsys IC Compiler proposed computed and analysed against existing adders. demonstrate 37.67%, 18.21%, 18.14% 15.92% reduction consumption 8-bit ACLA-I, -II, -III -IV respectively adder. 16-bit Re-CLAs require only 1.92% 7.08% more achieving reconfigurability. Finally, Gaussian smoothing filters embedded with show efficiency acceptable image quality state-of-the-art architectures.