Negative voltage decoding in non-volatile memories

摘要: A negative voltage decoder applies a to the sense line of selected row memory array but not lines unselected rows. The includes source, an P-channel transistors, and address signal generator. transistors in have gates coupled lines, so that signals on turn connect only source. charge pumps generator generates lower than In one embodiment, transistor has rows which fit pitch individual are stacked laterally away from array, each couples through set lines. When positive provides high shut off directly An isolation circuit isolates applied by decoder.