作者: Pasquale A. Cardenia , Alfred W. Muir , Thomas V. Landon
DOI:
关键词:
摘要: An electron beam exposure system for forming integrated circuit patterns in which pattern data provided by either a control processor or mass storage device is transferred through buffer interface contains large memory, the reading and writing of automatically controlled read write logic contained within interface. Data to over busses having width less than capable being stored at an addressable location memory. Automatic assembly larger units requires only initialization processor. address sequencing subsequent transfers carried out under self-incrementing registers self-decrementing word count registers. Transfers column, generator, units, while are as sub-units unit compatable with their respective buss widths.