A compact neural core for digital implementation of the Neural Engineering Framework

摘要: The Neural Engineering Framework (NEF) is a tool that capable of synthesising large-scale cognitive systems from subnetworks; and it has been used to construct SPAUN, which the first brain model performing tasks. It implemented on computers using high-level programming languages. However software runs much slower than real time, therefore not for applications need real-time control, such as interactive robotic systems. Here we present compact neural core digital implementation NEF Field Programmable Gate Arrays (FPGAs) in time. proposed consists 64 neurons are instantiated by single physical neuron time-multiplexing approach. As intrinsically uses spike rate-encoding paradigm, rather implementing spiking then measuring their firing rates, chose implement with compute rate directly. efficiently 9-bit fixed-point multiplier without requirement memory, bandwidth memory being bottleneck only fraction hardware resources commercial-off-the-shelf FPGA (even an entry level one) can be easily programmed different mathematical computations. Multiple cores combined build networks Framework.