An SRAM-based implementation of a convolutional neural network

摘要: In the last decade, computational neuroscience and machine learning communities have witnessed emergence of several algorithms where an input signal is randomly projected to a higher dimensional space via nonlinear activation function. These methods are increasingly popular for regression or classification tasks, but this kind neural network has remained difficult implement efficiently in hardware. This partly due all-to-all connectivity required between hidden layers these networks. The concept using receptive fields (RF) tasks stems from biology, which sensory neurons often respond limited spatial range stimulus. Incorporating methodology into system yields increase performance. paper presents SRAM-based implementation RF approach on Since SRAM much smaller footprint compared logic gates, more efficient terms hardware resources. was implemented verified FPGA demonstrate efficiencies flexibility MNIST digit recognition task.