Enhancement of the device characteristics for nanoscale charge trap flash memory devices utilizing a metal spacer layer
作者： Hyun Woo Kim , Joo Hyung You , Dea Uk Lee , Tae Whan Kim , Keun Woo Lee
DOI: 10.1109/SISPAD.2011.6035086
关键词:
摘要: Nanoscale charge trap flash (CTF) memory devices with a metal spacer layer were designed to decrease the interference effect and increase fringing field coupling ratio. The optimum depth of was determined enhance device performance devices. drain current threshold voltage shifts CTF increased due an in ratio resulting from existence optimized spacer. between neighboring cells decreased shielding electric layer.
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