作者: Sang-Goo Jung , Jong-Ho Lee
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摘要: In this article, we proposed a novel `I' shape floating gate applicable to the sub-70 nm flash memory cell with high performance and scalability. It has modified of conventional have coupling-ratio (CR), low effect interference or cross-talk. Specifically, it ~13% higher CR ~33/46% lower cross-talk bit-line/word-line state than those scale-downed geometry. addition, shows improved characteristics about programming time, drain disturbance, read current, sub-threshold swing, induced barrier lowering cell.