作者: Mel Bazes
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摘要: An input buffer circuit for providing corresponding CMOS compatible signals to an signal. The is comprised of a switched-capacitor voltage division network reference comparator. comparator accepts and determines if the greater or less than generates output, which determined by value signal in voltage. generator two capacitive devices, wherein first device charged second discharged during time period charges on devices are shared period. A ratio capacitances these at junction capacitors, then capacitors n-type p-type provide immunity variations process temperature.