A dynamic voltage scaled microprocessor system
作者： T.D. Burd , T.A. Pering , A.J. Stratakos , R.W. Brodersen
DOI: 10.1109/4.881202
关键词:
摘要: The microprocessor system in portable electronic devices often has a time-varying computational load which is comprised of: (1) compute-intensive and low-latency processes, (2) background high-latency (3) idle. key design objectives for the processor systems these applications are providing highest possible peak performance code (e.g., handwriting recognition, image decompression) while maximizing battery life remaining low periods. If clock frequency supply voltage dynamically varied response to demands, then energy consumed per process can be reduced periods, retaining when required. This strategy, achieves efficiency loads, called dynamic scaling (DVS).
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