Suppressing production of bus transactions by a virtual-bus interface
作者： Ryan Thompson , Zachary Smith , John Maly
DOI:
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摘要: Systems, methodologies, media, and other embodiments associated with processing point-to-point transactions that are not be processed into bus model by a virtual interface configured to convert bus-type described. One exemplary system embodiment includes detection logic facilitates identifying transaction is type tracking the related packets through also suppressing generating from transaction.
lens.org 参考文章(12)
Charles P. Zeller, Darius D. Gaskins, Cache-based computer system employing a peripheral bus interface unit with cache write-back suppression and processor-peripheral communication suppression for data coherency ,(1996)
Jonathan Owen, Mark Hummel, Derrick Meyer, System and method of initializing a computer processing system having a plurality of point-to-point links interconnecting a plurality of devices ,(2001)
Hung-Yi Kuo, Control chip, circuit and method thereof for inhibiting bus cycle ,(2003)
Richard Pekkala, Christopher Pettey, Shaun Wandler, Lawrence Rubin, Apparatus amd method for disparate fabric data and transaction buffering within infiniband device ,(2001)
Patrik Westerkull, Hearing-aid interconnection system ,(2005)
Reiner Ludwig, Michael Meyer, Communication device and method ,(1999)
Rocco L. Martino, Telephone/Transaction Entry Device and System for Entering Transaction Data into Databases ,(2007)
Pete D. Vogt, Stephen S. Chang, George P. White, System and method for maintaining memory coherency in a computer system having multiple system buses ,(1997)
Daniel Fu, Carl G. Amdahl, Yuanlong Wang, Earl T. Cohen, Brian R. Biard, Channel interface and protocols for cache coherency in a scalable symmetric multiprocessor system ,(1999)
James Mergard, Dale E. Gulick, Larry D. Hewitt, I/O node for a computer system including an integrated graphics engine and an integrated I/O hub ,(2001)