作者: Yogesh Ramadass , Ayman Fayed , Baher Haroun , Anantha Chandrakasan
DOI: 10.1109/ISSCC.2010.5433984
关键词:
摘要: Reducing power consumption through V DD scaling is a major trend in nanometer CMOS circuits. In modern wireless SoCs, multiple domains operate below 1.2V and draw less than 10mA of current. Currently, these are powered from 1.8V rail low drop-out linear regulator (LDO). The obtained Li-ion battery using switching with off-chip passives. It highly inefficient to circuit blocks that LDOs. Switched-capacitor (SC) DC-DC converters viable solution replace LDOs some on-chip but they currently occupy large area [1]. Also, the voltage regulation schemes employed by current SC either unsuitable systems or do not provide high efficiencies use cases due dominance bottom-plate losses [2]. this paper, completely converter uses digital capacitance modulation scheme achieve presented. occupies only 0.16mm2 total provides up 8mA output voltages between 0.8V 1V input while at 30MHz.