A graph-theoretic approach to clock skew optimization

作者: R.B. Deokar , S.S. Sapatnekar

DOI: 10.1109/ISCAS.1994.408825

关键词:

摘要: This paper addresses the problem of minimizing clock period a circuit by optimizing skews. We incorporate uncertainty factors and present formulation that ensures optimization will be safe. In J.P. Fishburn (see IEEE Trans. on Computers, vol. 39, no. 7, p. 945-951, 1990) is formulated as linear program. first propose an efficient graph-based solution takes advantage structure problem. also show results obtained may result in exceedingly large skews, method to reduce these skews without sacrificing optimality period. Experimental several ISCAS89 benchmark circuits are provided. >

参考文章(5)
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