A VLSI architecture for fast and accurate floating-point sine/cosine evaluation

摘要: A VLSI architecture is presented, combining floating-point and simple fixed-point arithmetic. The algorithm implemented by the based on second-order polynomial interpolation. exploitation of certain properties trigonometric functions specific bit patterns which appear in involved computations, has led to a 40% memory size reduction low overall hardware complexity. time required evaluate sine less than for three single-precision MACs, while computed sines cosines are guaranteed be accurate half an ulp (unit last position).