Automatic layout design for power module
作者： Puqi Ning , Fei Wang , K. D. T. Ngo
DOI: 10.1109/TPEL.2011.2180739
关键词:
摘要: The layout of power modules is one the key points in module design, especially for high densities, where couplings are increased. In this paper, along with design example, automatic processes by using a genetic algorithm presented. Some practical considerations and implementations introduced optimization design.
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sci-hub.se 参考文章(14)
S. Nakaya, T. Koide, S. Wakabayashi, An adaptive genetic algorithm for VLSI floorplanning based on sequence-pair international symposium on circuits and systems. ,vol. 3, pp. 65- 68 ,(2000) , 10.1109/ISCAS.2000.855997
Jonah Zhou Chen, Ying Feng Pang, D. Boroyevich, E.P. Scott, K.A. Thole, Electrical and thermal layout design considerations for integrated power electronics modules ieee industry applications society annual meeting. ,vol. 1, pp. 242- 246 ,(2002) , 10.1109/IAS.2002.1044095
H.A. Mustain, A.B. Lostetter, W.D. Brown, Evaluation of gold and aluminum wire bond performance for high temperature (500 /spl deg/C) silicon carbide (SiC) power modules electronic components and technology conference. pp. 1623- 1628 ,(2005) , 10.1109/ECTC.2005.1442008
B. Lu, W. Dong, Q. Zhao, F.C. Lee, Performance evaluation of CoolMOS/sup /spl trade// and SiC diode for single-phase power factor correction applications applied power electronics conference. ,vol. 2, pp. 651- 657 ,(2003) , 10.1109/APEC.2003.1179283
Z. Liang, B. Lu, J.D. vanWyk, F.C. Lee, Integrated CoolMOS FET/SiC-diode module for high performance power switching IEEE Transactions on Power Electronics. ,vol. 20, pp. 679- 686 ,(2005) , 10.1109/TPEL.2005.846547
Naveed Hingora, Xiangyu Liu, Yongfeng Feng, Brice McPherson, Alan Mantooth, Power-CAD: A novel methodology for design, analysis and optimization of Power Electronic Module layouts 2010 IEEE Energy Conversion Congress and Exposition. pp. 2692- 2699 ,(2010) , 10.1109/ECCE.2010.5618043
K. Hatta, S. Wakabayashi, T. Koide, Solving the rectangular packing problem by an adaptive GA based on sequence-pair asia and south pacific design automation conference. pp. 181- 184 ,(1999) , 10.1109/ASPDAC.1999.759990
C. Martin, J.-M. Guichon, J.-L. Schanen, R.-J. Pasterczyk, Gate Circuit Layout Optimization of Power Module Regarding Transient Current Imbalance IEEE Transactions on Power Electronics. ,vol. 21, pp. 1176- 1184 ,(2006) , 10.1109/TPEL.2006.880356
J.D. vanWyk, F.C. Lee, Z. Liang, R. Chen, S. Wang, B. Lu, Integrating active, passive and EMI-filter functions in power electronics systems:a case study of some technologies IEEE Transactions on Power Electronics. ,vol. 20, pp. 523- 536 ,(2005) , 10.1109/TPEL.2005.846553
Naveed Hingora, Xiangyu Liu, Brice McPherson, Yongfeng Feng, H. Alan Mantooth, Concerning layout synthesis for power electronic multi-chip modules workshop on control and modeling for power electronics. pp. 1- 5 ,(2010) , 10.1109/COMPEL.2010.5562416