Method and circuit for adjusting the timing of output data based on the current and future states of the output data
作者： Greg A. Blodgett , Yangsung Joo
DOI:
关键词:
摘要: A clock synchronization circuit receives an input signal along with current and future data signals. The generates a phase shifted in response to the signal, having shift relative that is function of may also generate plurality signals, each respective logic states groups other
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