Inspection pattern, inspection method, and inspection system for detection of latent defect of multi-layer wiring structure

摘要: An inspection pattern, an method, and system for detection of a latent defect multi-layer wiring structure formed on the semiconductor wafer. The pattern includes lower-layer portions, upper-layer insulating layer provided between them, contact units connecting them to form chain, electrode terminals. method steps acquiring applied-voltage versus measured-current characteristic or elapsed-time measured-voltage judging presence absence basis acquired characteristic. voltage-applying/current-measuring device constant-current-feeding/voltage-measuring device, pattern.