Configuration finalization on first valid NAND command
作者： Frankie F. Roohparvar
DOI:
关键词:
摘要: A startup method and circuit to allow high current consumption for processes of a low operating voltage memory device such as NAND until the receipt valid command device. Upon command, functions are ceased at consumption, normal operation begins without need using an unreliable power on reset circuit.
lens.org 参考文章(18)
David S. Hwang, Microprocessor to NAND flash interface ,(1998)
Hideo Akiyoshi, Power-on reset circuit/method for initializing an integrated circuit ,(2001)
Paul R. Patrick, Event driven power reducing software state machine ,(1994)
Clifford Zitlaw, Frankie Fariborz Roohparvar, Power up initialization for memory ,(2006)
Giulio Giuseppe Marotta, Conditioned and robust ultra-low power power-on reset sequencer for integrated circuits ,(2002)
Il-man Bae, Jae-hoon Kim, Jae-Hyeong Lee, Method of generating initializing signal in semiconductor memory device ,(2003)
Dae-Seok Byeon, Kyeong-Han Lee, Power detecting circuit and method for stable power-on reading of flash memory device using the same ,(2003)
Nikolas Sredanovic, Helena Calendar, Initialization of non-volatile programmable latches in circuits in which an initialization operation is performed ,(1998)
Bassem Radieddine, Mark N. Slamowitz, Power-on reset circuit for use in low power supply voltage applications ,(2002)
Daryush Shamlou, Rajiv Gupta, Raouf Halim, Supply sensing power-on reset circuit ,(1994)