作者: R. Tao , M. Berroth
DOI: 10.1109/ESSCIRC.2003.1257194
关键词:
摘要: A high speed, low noise fully differential transimpedance amplifier has been designed and implemented in 0.18 /spl mu/m standard digital CMOS technology. The parallel feedback circuit topology is adopted to broaden the bandwidth. This preamplifier a power gain S21 of 22 dB with bandwidth 6GHz, can operate at 10 Gb/s dynamic range from 2.5/spl mu/A up 2.5 mA. consumption only 88 mW.