Inter-processor communication protocol
作者： Grover Timothy Surratt , Thomas Patrick Bishop , David Nicholas Horn , Lawrence Arno Welsch , Mark Henry Davis
DOI:
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摘要: Processors (101) of a multiprocessor system (FIG. 1) communicate across bus (150) via low-latency packet protocol featuring per-logical channel input queues (143) and output (144), different per-processor priorities for sending data packets 10) packet-acknowledging "quick" messages 11), separate buffers (923; 918) receiving messages, respectively. Transmitted afflicted by error, receive buffer overflow, queue-full conditions are discarded the processor retransmitted processor.
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