作者: Jongsun Park , Kaushik Roy
DOI: 10.1007/S11265-008-0242-2
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摘要: In this paper we present a low complexity discrete cosine transform (DCT) architecture based on computation re-use in vector-scalar product. 1-D DCT operation is expressed as additions of products and basic common computations are identified shared to reduce computational operation. Compared general distributed arithmetic architecture, the proposed shows 38% area 18% power savings with little performance degradation. We also propose an efficient method trade off image quality for complexity. The approach modification bases bit-wise manner different complexity/image trade-off levels suggested. Finally, above approaches, which can dynamically reconfigure from one level another. reconfigurable achieve ranging 28% 56% 3 levels.